Differential impedance of two edge-coupled traces, on an outer layer (microstrip) or an inner layer (stripline). Also gives odd, even and common-mode impedance, and can find the trace width or gap for a target such as 90 Ω (USB) or 100 Ω (Ethernet, LVDS, PCIe).
Coupled microstrip. Kirschning and Jansen's equations for the even- and odd-mode effective dielectric constants and impedances, with Jansen's thickness correction of the even and odd widths. The single-line reference uses Hammerstad and Jensen's model including copper thickness. Checked against a 2D field solver: the odd-mode impedance agrees within about 3 % for 1 oz copper (the original zero-thickness reference overestimates it by 5–10 %).
Coupled stripline. Cohn's exact conformal-mapping solution for zero-thickness coupled strips, Z0e,o = η0/(4√εr) · K(k′e,o)/K(ke,o), with ke = tanh(πw/2b)·tanh(π(w+s)/2b) and ko = tanh(πw/2b)·coth(π(w+s)/2b), corrected for thickness with Cohn's fringe-capacitance method. Offset pairs combine two centred pairs (image method) with Wadell's correction.
Definitions. Zdiff = 2·Zodd; Zcommon = Zeven/2; coupling coefficient k = (Zeven − Zodd)/(Zeven + Zodd). K(k) is the complete elliptic integral of the first kind, computed with the arithmetic-geometric mean.
Accuracy. Microstrip and centred stripline pairs: about ±3 %. Offset stripline pairs: about ±5 %. Confirm a controlled-impedance design with your manufacturer's field solver.
Coupling between the two traces lowers the odd-mode impedance. The closer the traces, the lower Zdiff is compared with twice the impedance of one trace alone.
Tight coupling (gap about equal to the width) gives better noise rejection and smaller pairs. Loose coupling makes the impedance less sensitive to gap tolerance. Both work if the impedance is right and the pair stays symmetric.
Impedance of an outer-layer trace over a plane, with solder mask or embedded, and width for a target impedance.
Impedance of an inner-layer trace between two planes, symmetric or offset, and width for a target.
Impedance of a coplanar waveguide, with or without a ground plane underneath (grounded CPW).
Width a trace needs for a current, or the current a trace can carry, with IPC-2152 and IPC-2221.
Current capacity, resistance, thermal resistance, capacitance and inductance of a plated via.
Thermal resistance of an array of vias under a pad, with fill options, and the temperature drop through the board.